EnOcean 5 Device Settings

Settings of EnOcean 5 Click driver. More...

Macros
#define	ENOCEAN5_PKT_SYNC_BYTE   0x55
	EnOcean 5 packet sync byte.
#define	ENOCEAN5_PKT_TYPE_RADIO_ERP1   0x01
	EnOcean 5 packet type bytes.
#define	ENOCEAN5_PKT_TYPE_RESPONSE   0x02
#define	ENOCEAN5_PKT_TYPE_EVENT   0x04
#define	ENOCEAN5_PKT_TYPE_COMMON_CMD   0x05
#define	ENOCEAN5_PKT_TYPE_REMOTE_MAN_CMD   0x07
#define	ENOCEAN5_PKT_TYPE_RADIO_MESSAGE   0x09
#define	ENOCEAN5_PKT_TYPE_RADIO_ERP2   0x0A
#define	ENOCEAN5_CMD_WR_SLEEP   0x01
	EnOcean 5 command code bytes.
#define	ENOCEAN5_CMD_WR_RESET   0x02
#define	ENOCEAN5_CMD_RD_VERSION   0x03
#define	ENOCEAN5_CMD_WR_IDBASE   0x07
#define	ENOCEAN5_CMD_RD_IDBASE   0x08
#define	ENOCEAN5_CMD_WR_REPEATER   0x09
#define	ENOCEAN5_CMD_RD_REPEATER   0x0A
#define	ENOCEAN5_CMD_WR_FILTER_ADD   0x0B
#define	ENOCEAN5_CMD_WR_FILTER_DEL   0x0C
#define	ENOCEAN5_CMD_WR_FILTER_DEL_ALL   0x0D
#define	ENOCEAN5_CMD_WR_FILTER_ENABLE   0x0E
#define	ENOCEAN5_CMD_RD_FILTER   0x0F
#define	ENOCEAN5_CMD_WR_WAIT_MATURITY   0x10
#define	ENOCEAN5_CMD_WR_LEARNMODE   0x17
#define	ENOCEAN5_CMD_RD_LEARNMODE   0x18
#define	ENOCEAN5_CMD_WR_SECDEV_DEL   0x1A
#define	ENOCEAN5_CMD_WR_MODE   0x1C
#define	ENOCEAN5_CMD_RD_SECDEV_COUNT   0x1D
#define	ENOCEAN5_CMD_RD_SECDEV_BY_ID   0x1E
#define	ENOCEAN5_CMD_WR_SECDEV_SENDTECHIN   0x20
#define	ENOCEAN5_CMD_RD_DUTYCYCLE_LIMIT   0x23
#define	ENOCEAN5_CMD_SET_BAUDRATE   0x24
#define	ENOCEAN5_CMD_GET_FREQUENCY_INFO   0x25
#define	ENOCEAN5_CMD_WR_STARTUP_DELAY   0x2F
#define	ENOCEAN5_CMD_SET_CRC_SIZE   0x34
#define	ENOCEAN5_CMD_GET_CRC_SIZE   0x35
#define	ENOCEAN5_CMD_WR_RLC_SAVE_PERIOD   0x36
#define	ENOCEAN5_CMD_WR_RLC_LEGACY_MODE   0x37
#define	ENOCEAN5_CMD_WR_SECDEV2_ADD   0x38
#define	ENOCEAN5_CMD_WR_RSSITESTMODE   0x3A
#define	ENOCEAN5_CMD_RD_RSSITESTMODE   0x3B
#define	ENOCEAN5_CMD_WR_SECDEV_MAINKEY   0x3C
#define	ENOCEAN5_CMD_RD_SECDEV_MAINKEY   0x3D
#define	ENOCEAN5_CMD_WR_TRANSPARENT_MODE   0x3E
#define	ENOCEAN5_CMD_RD_TRANSPARENT_MODE   0x3F
#define	ENOCEAN5_CMD_WR_TX_ONLY_MODE   0x40
#define	ENOCEAN5_CMD_RD_TX_ONLY_MODE   0x41
#define	ENOCEAN5_RET_OK   0x00
	EnOcean 5 return code bytes.
#define	ENOCEAN5_RET_ERROR   0x01
#define	ENOCEAN5_RET_NOT_SUPPORTED   0x02
#define	ENOCEAN5_RET_WRONG_PARAM   0x03
#define	ENOCEAN5_RET_OPERATION_DENIED   0x04
#define	ENOCEAN5_RET_LOCK_SET   0x05
#define	ENOCEAN5_RET_BUFFER_TOO_SMALL   0x06
#define	ENOCEAN5_RET_NO_FREE_BUFFER   0x07
#define	ENOCEAN5_EVT_READY   0x04
	EnOcean 5 event code bytes.
#define	ENOCEAN5_EVT_SECUREDEVICES   0x05
#define	ENOCEAN5_EVT_DUTYCYCLE_LIMIT   0x06
#define	ENOCEAN5_EVT_TX_DONE   0x08
#define	ENOCEAN5_EVT_LRN_MODE_DISABLED   0x09
#define	ENOCEAN5_FILTER_TYPE_SOURCE_ID   0x00
	EnOcean 5 filter setting bytes.
#define	ENOCEAN5_FILTER_TYPE_RORG   0x01
#define	ENOCEAN5_FILTER_TYPE_RSSI   0x02
#define	ENOCEAN5_FILTER_TYPE_DESTINATION_ID   0x03
#define	ENOCEAN5_FILTER_ACTION_FW_FALSE   0x00
#define	ENOCEAN5_FILTER_ACTION_FW_TRUE   0x80
#define	ENOCEAN5_FILTER_ACTION_REP_FALSE   0x40
#define	ENOCEAN5_FILTER_ACTION_REP_TRUE   0xC0
#define	ENOCEAN5_WAKEUP_VOLTAGE_DROP   0x00
	EnOcean 5 wake-up cause bytes.
#define	ENOCEAN5_WAKEUP_HW_RESET   0x01
#define	ENOCEAN5_WAKEUP_WATCHDOG   0x02
#define	ENOCEAN5_WAKEUP_FLYWHEEL   0x03
#define	ENOCEAN5_WAKEUP_PARITY_ERROR   0x04
#define	ENOCEAN5_WAKEUP_MEMORY_ERROR   0x05
#define	ENOCEAN5_WAKEUP_INVALID_MEM_ADDR   0x06
#define	ENOCEAN5_WAKEUP_HW_WAKEUP_PIN0   0x07
#define	ENOCEAN5_WAKEUP_HW_WAKEUP_PIN1   0x08
#define	ENOCEAN5_WAKEUP_UNKNOWN_RESET   0x09
#define	ENOCEAN5_WAKEUP_UART   0x0A
#define	ENOCEAN5_WAKEUP_SW_RESET   0x0B
#define	ENOCEAN5_ERP1_SEC_LVL_NOT_PROC   0x00
	EnOcean 5 ERP1 security level bytes.
#define	ENOCEAN5_ERP1_SEC_LVL_OBSOLETE   0x01
#define	ENOCEAN5_ERP1_SEC_LVL_DECR   0x02
#define	ENOCEAN5_ERP1_SEC_LVL_AUTH   0x03
#define	ENOCEAN5_ERP1_SEC_LVL_DECR_AUTH   0x04
#define	ENOCEAN5_RORG_RPS   0xF6
	EnOcean 5 telegram types.
#define	ENOCEAN5_RORG_1BS   0xD5
#define	ENOCEAN5_RORG_4BS   0xA5
#define	ENOCEAN5_RORG_VLD   0xD2
#define	ENOCEAN5_RORG_MSC   0xD1
#define	ENOCEAN5_RORG_ADT   0xA6
#define	ENOCEAN5_RORG_SM_LRN_REQ   0xC6
#define	ENOCEAN5_RORG_SM_LRN_ANS   0xC7
#define	ENOCEAN5_RORG_SM_REC   0xA7
#define	ENOCEAN5_RORG_SYS_EX   0xC5
#define	ENOCEAN5_RORG_SEC   0x30
#define	ENOCEAN5_RORG_SEC_ENCAPS   0x31
#define	ENOCEAN5_RORG_SEC_MAN   0x34
#define	ENOCEAN5_RORG_SIGNAL   0xD0
#define	ENOCEAN5_RORG_UTE   0xD4
#define	ENOCEAN5_BROADCAST_ID   ( 0xFFFFFFFFul )
	EnOcean 5 device ID bytes.
#define	ENOCEAN5_TX_ID   ( 0x00000000ul )
#define	ENOCEAN5_RSP_TIMEOUT_1000MS   1000
	EnOcean 5 response timeout settings.
#define	ENOCEAN5_WAIT_TIME_1S   1
#define	ENOCEAN5_WAIT_TIME_5S   5
#define	ENOCEAN5_WAIT_TIME_60S   60
#define	ENOCEAN5_TX_DRV_BUFFER_SIZE   300
	EnOcean 5 driver buffer size.
#define	ENOCEAN5_RX_DRV_BUFFER_SIZE   300
#define	ENOCEAN5_PAYLOAD_BUFFER_SIZE   256
#define	ENOCEAN5_PAYLOAD_OPT_BUFFER_SIZE   10

Detailed Description

Settings of EnOcean 5 Click driver.

Macro Definition Documentation

ENOCEAN5_BROADCAST_ID

#define ENOCEAN5_BROADCAST_ID   ( 0xFFFFFFFFul )

EnOcean 5 device ID bytes.

Specified device ID bytes of EnOcean 5 Click driver.

ENOCEAN5_CMD_GET_CRC_SIZE

#define ENOCEAN5_CMD_GET_CRC_SIZE   0x35

ENOCEAN5_CMD_GET_FREQUENCY_INFO

#define ENOCEAN5_CMD_GET_FREQUENCY_INFO   0x25

ENOCEAN5_CMD_RD_DUTYCYCLE_LIMIT

#define ENOCEAN5_CMD_RD_DUTYCYCLE_LIMIT   0x23

ENOCEAN5_CMD_RD_FILTER

#define ENOCEAN5_CMD_RD_FILTER   0x0F

ENOCEAN5_CMD_RD_IDBASE

#define ENOCEAN5_CMD_RD_IDBASE   0x08

ENOCEAN5_CMD_RD_LEARNMODE

#define ENOCEAN5_CMD_RD_LEARNMODE   0x18

ENOCEAN5_CMD_RD_REPEATER

#define ENOCEAN5_CMD_RD_REPEATER   0x0A

ENOCEAN5_CMD_RD_RSSITESTMODE

#define ENOCEAN5_CMD_RD_RSSITESTMODE   0x3B

ENOCEAN5_CMD_RD_SECDEV_BY_ID

#define ENOCEAN5_CMD_RD_SECDEV_BY_ID   0x1E

ENOCEAN5_CMD_RD_SECDEV_COUNT

#define ENOCEAN5_CMD_RD_SECDEV_COUNT   0x1D

ENOCEAN5_CMD_RD_SECDEV_MAINKEY

#define ENOCEAN5_CMD_RD_SECDEV_MAINKEY   0x3D

ENOCEAN5_CMD_RD_TRANSPARENT_MODE

#define ENOCEAN5_CMD_RD_TRANSPARENT_MODE   0x3F

ENOCEAN5_CMD_RD_TX_ONLY_MODE

#define ENOCEAN5_CMD_RD_TX_ONLY_MODE   0x41

ENOCEAN5_CMD_RD_VERSION

#define ENOCEAN5_CMD_RD_VERSION   0x03

ENOCEAN5_CMD_SET_BAUDRATE

#define ENOCEAN5_CMD_SET_BAUDRATE   0x24

ENOCEAN5_CMD_SET_CRC_SIZE

#define ENOCEAN5_CMD_SET_CRC_SIZE   0x34

ENOCEAN5_CMD_WR_FILTER_ADD

#define ENOCEAN5_CMD_WR_FILTER_ADD   0x0B

ENOCEAN5_CMD_WR_FILTER_DEL

#define ENOCEAN5_CMD_WR_FILTER_DEL   0x0C

ENOCEAN5_CMD_WR_FILTER_DEL_ALL

#define ENOCEAN5_CMD_WR_FILTER_DEL_ALL   0x0D

ENOCEAN5_CMD_WR_FILTER_ENABLE

#define ENOCEAN5_CMD_WR_FILTER_ENABLE   0x0E

ENOCEAN5_CMD_WR_IDBASE

#define ENOCEAN5_CMD_WR_IDBASE   0x07

ENOCEAN5_CMD_WR_LEARNMODE

#define ENOCEAN5_CMD_WR_LEARNMODE   0x17

ENOCEAN5_CMD_WR_MODE

#define ENOCEAN5_CMD_WR_MODE   0x1C

ENOCEAN5_CMD_WR_REPEATER

#define ENOCEAN5_CMD_WR_REPEATER   0x09

ENOCEAN5_CMD_WR_RESET

#define ENOCEAN5_CMD_WR_RESET   0x02

ENOCEAN5_CMD_WR_RLC_LEGACY_MODE

#define ENOCEAN5_CMD_WR_RLC_LEGACY_MODE   0x37

ENOCEAN5_CMD_WR_RLC_SAVE_PERIOD

#define ENOCEAN5_CMD_WR_RLC_SAVE_PERIOD   0x36

ENOCEAN5_CMD_WR_RSSITESTMODE

#define ENOCEAN5_CMD_WR_RSSITESTMODE   0x3A

ENOCEAN5_CMD_WR_SECDEV2_ADD

#define ENOCEAN5_CMD_WR_SECDEV2_ADD   0x38

ENOCEAN5_CMD_WR_SECDEV_DEL

#define ENOCEAN5_CMD_WR_SECDEV_DEL   0x1A

ENOCEAN5_CMD_WR_SECDEV_MAINKEY

#define ENOCEAN5_CMD_WR_SECDEV_MAINKEY   0x3C

ENOCEAN5_CMD_WR_SECDEV_SENDTECHIN

#define ENOCEAN5_CMD_WR_SECDEV_SENDTECHIN   0x20

ENOCEAN5_CMD_WR_SLEEP

#define ENOCEAN5_CMD_WR_SLEEP   0x01

EnOcean 5 command code bytes.

Specified command code bytes of EnOcean 5 Click driver.

ENOCEAN5_CMD_WR_STARTUP_DELAY

#define ENOCEAN5_CMD_WR_STARTUP_DELAY   0x2F

ENOCEAN5_CMD_WR_TRANSPARENT_MODE

#define ENOCEAN5_CMD_WR_TRANSPARENT_MODE   0x3E

ENOCEAN5_CMD_WR_TX_ONLY_MODE

#define ENOCEAN5_CMD_WR_TX_ONLY_MODE   0x40

ENOCEAN5_CMD_WR_WAIT_MATURITY

#define ENOCEAN5_CMD_WR_WAIT_MATURITY   0x10

ENOCEAN5_ERP1_SEC_LVL_AUTH

#define ENOCEAN5_ERP1_SEC_LVL_AUTH   0x03

ENOCEAN5_ERP1_SEC_LVL_DECR

#define ENOCEAN5_ERP1_SEC_LVL_DECR   0x02

ENOCEAN5_ERP1_SEC_LVL_DECR_AUTH

#define ENOCEAN5_ERP1_SEC_LVL_DECR_AUTH   0x04

ENOCEAN5_ERP1_SEC_LVL_NOT_PROC

#define ENOCEAN5_ERP1_SEC_LVL_NOT_PROC   0x00

EnOcean 5 ERP1 security level bytes.

Specified ERP1 security level bytes of EnOcean 5 Click driver.

ENOCEAN5_ERP1_SEC_LVL_OBSOLETE

#define ENOCEAN5_ERP1_SEC_LVL_OBSOLETE   0x01

ENOCEAN5_EVT_DUTYCYCLE_LIMIT

#define ENOCEAN5_EVT_DUTYCYCLE_LIMIT   0x06

ENOCEAN5_EVT_LRN_MODE_DISABLED

#define ENOCEAN5_EVT_LRN_MODE_DISABLED   0x09

ENOCEAN5_EVT_READY

#define ENOCEAN5_EVT_READY   0x04

EnOcean 5 event code bytes.

Specified event code bytes of EnOcean 5 Click driver.

ENOCEAN5_EVT_SECUREDEVICES

#define ENOCEAN5_EVT_SECUREDEVICES   0x05

ENOCEAN5_EVT_TX_DONE

#define ENOCEAN5_EVT_TX_DONE   0x08

ENOCEAN5_FILTER_ACTION_FW_FALSE

#define ENOCEAN5_FILTER_ACTION_FW_FALSE   0x00

ENOCEAN5_FILTER_ACTION_FW_TRUE

#define ENOCEAN5_FILTER_ACTION_FW_TRUE   0x80

ENOCEAN5_FILTER_ACTION_REP_FALSE

#define ENOCEAN5_FILTER_ACTION_REP_FALSE   0x40

ENOCEAN5_FILTER_ACTION_REP_TRUE

#define ENOCEAN5_FILTER_ACTION_REP_TRUE   0xC0

ENOCEAN5_FILTER_TYPE_DESTINATION_ID

#define ENOCEAN5_FILTER_TYPE_DESTINATION_ID   0x03

ENOCEAN5_FILTER_TYPE_RORG

#define ENOCEAN5_FILTER_TYPE_RORG   0x01

ENOCEAN5_FILTER_TYPE_RSSI

#define ENOCEAN5_FILTER_TYPE_RSSI   0x02

ENOCEAN5_FILTER_TYPE_SOURCE_ID

#define ENOCEAN5_FILTER_TYPE_SOURCE_ID   0x00

EnOcean 5 filter setting bytes.

Specified filter setting bytes of EnOcean 5 Click driver.

ENOCEAN5_PAYLOAD_BUFFER_SIZE

#define ENOCEAN5_PAYLOAD_BUFFER_SIZE   256

ENOCEAN5_PAYLOAD_OPT_BUFFER_SIZE

#define ENOCEAN5_PAYLOAD_OPT_BUFFER_SIZE   10

ENOCEAN5_PKT_SYNC_BYTE

#define ENOCEAN5_PKT_SYNC_BYTE   0x55

EnOcean 5 packet sync byte.

Specified packet sync byte of EnOcean 5 Click driver.

ENOCEAN5_PKT_TYPE_COMMON_CMD

#define ENOCEAN5_PKT_TYPE_COMMON_CMD   0x05

ENOCEAN5_PKT_TYPE_EVENT

#define ENOCEAN5_PKT_TYPE_EVENT   0x04

ENOCEAN5_PKT_TYPE_RADIO_ERP1

#define ENOCEAN5_PKT_TYPE_RADIO_ERP1   0x01

EnOcean 5 packet type bytes.

Specified packet type bytes of EnOcean 5 Click driver.

ENOCEAN5_PKT_TYPE_RADIO_ERP2

#define ENOCEAN5_PKT_TYPE_RADIO_ERP2   0x0A

ENOCEAN5_PKT_TYPE_RADIO_MESSAGE

#define ENOCEAN5_PKT_TYPE_RADIO_MESSAGE   0x09

ENOCEAN5_PKT_TYPE_REMOTE_MAN_CMD

#define ENOCEAN5_PKT_TYPE_REMOTE_MAN_CMD   0x07

ENOCEAN5_PKT_TYPE_RESPONSE

#define ENOCEAN5_PKT_TYPE_RESPONSE   0x02

ENOCEAN5_RET_BUFFER_TOO_SMALL

#define ENOCEAN5_RET_BUFFER_TOO_SMALL   0x06

ENOCEAN5_RET_ERROR

#define ENOCEAN5_RET_ERROR   0x01

ENOCEAN5_RET_LOCK_SET

#define ENOCEAN5_RET_LOCK_SET   0x05

ENOCEAN5_RET_NO_FREE_BUFFER

#define ENOCEAN5_RET_NO_FREE_BUFFER   0x07

ENOCEAN5_RET_NOT_SUPPORTED

#define ENOCEAN5_RET_NOT_SUPPORTED   0x02

ENOCEAN5_RET_OK

#define ENOCEAN5_RET_OK   0x00

EnOcean 5 return code bytes.

Specified return code bytes of EnOcean 5 Click driver.

ENOCEAN5_RET_OPERATION_DENIED

#define ENOCEAN5_RET_OPERATION_DENIED   0x04

ENOCEAN5_RET_WRONG_PARAM

#define ENOCEAN5_RET_WRONG_PARAM   0x03

ENOCEAN5_RORG_1BS

#define ENOCEAN5_RORG_1BS   0xD5

ENOCEAN5_RORG_4BS

#define ENOCEAN5_RORG_4BS   0xA5

ENOCEAN5_RORG_ADT

#define ENOCEAN5_RORG_ADT   0xA6

ENOCEAN5_RORG_MSC

#define ENOCEAN5_RORG_MSC   0xD1

ENOCEAN5_RORG_RPS

#define ENOCEAN5_RORG_RPS   0xF6

EnOcean 5 telegram types.

Specified telegram types of EnOcean 5 Click driver.

ENOCEAN5_RORG_SEC

#define ENOCEAN5_RORG_SEC   0x30

ENOCEAN5_RORG_SEC_ENCAPS

#define ENOCEAN5_RORG_SEC_ENCAPS   0x31

ENOCEAN5_RORG_SEC_MAN

#define ENOCEAN5_RORG_SEC_MAN   0x34

ENOCEAN5_RORG_SIGNAL

#define ENOCEAN5_RORG_SIGNAL   0xD0

ENOCEAN5_RORG_SM_LRN_ANS

#define ENOCEAN5_RORG_SM_LRN_ANS   0xC7

ENOCEAN5_RORG_SM_LRN_REQ

#define ENOCEAN5_RORG_SM_LRN_REQ   0xC6

ENOCEAN5_RORG_SM_REC

#define ENOCEAN5_RORG_SM_REC   0xA7

ENOCEAN5_RORG_SYS_EX

#define ENOCEAN5_RORG_SYS_EX   0xC5

ENOCEAN5_RORG_UTE

#define ENOCEAN5_RORG_UTE   0xD4

ENOCEAN5_RORG_VLD

#define ENOCEAN5_RORG_VLD   0xD2

ENOCEAN5_RSP_TIMEOUT_1000MS

#define ENOCEAN5_RSP_TIMEOUT_1000MS   1000

EnOcean 5 response timeout settings.

Specified response timeout settings of EnOcean 5 Click driver.

ENOCEAN5_RX_DRV_BUFFER_SIZE

#define ENOCEAN5_RX_DRV_BUFFER_SIZE   300

ENOCEAN5_TX_DRV_BUFFER_SIZE

#define ENOCEAN5_TX_DRV_BUFFER_SIZE   300

EnOcean 5 driver buffer size.

Specified size of driver ring buffer.

Note

Increase buffer size if needed.

ENOCEAN5_TX_ID

#define ENOCEAN5_TX_ID   ( 0x00000000ul )

ENOCEAN5_WAIT_TIME_1S

#define ENOCEAN5_WAIT_TIME_1S   1

ENOCEAN5_WAIT_TIME_5S

#define ENOCEAN5_WAIT_TIME_5S   5

ENOCEAN5_WAIT_TIME_60S

#define ENOCEAN5_WAIT_TIME_60S   60

ENOCEAN5_WAKEUP_FLYWHEEL

#define ENOCEAN5_WAKEUP_FLYWHEEL   0x03

ENOCEAN5_WAKEUP_HW_RESET

#define ENOCEAN5_WAKEUP_HW_RESET   0x01

ENOCEAN5_WAKEUP_HW_WAKEUP_PIN0

#define ENOCEAN5_WAKEUP_HW_WAKEUP_PIN0   0x07

ENOCEAN5_WAKEUP_HW_WAKEUP_PIN1

#define ENOCEAN5_WAKEUP_HW_WAKEUP_PIN1   0x08

ENOCEAN5_WAKEUP_INVALID_MEM_ADDR

#define ENOCEAN5_WAKEUP_INVALID_MEM_ADDR   0x06

ENOCEAN5_WAKEUP_MEMORY_ERROR

#define ENOCEAN5_WAKEUP_MEMORY_ERROR   0x05

ENOCEAN5_WAKEUP_PARITY_ERROR

#define ENOCEAN5_WAKEUP_PARITY_ERROR   0x04

ENOCEAN5_WAKEUP_SW_RESET

#define ENOCEAN5_WAKEUP_SW_RESET   0x0B

ENOCEAN5_WAKEUP_UART

#define ENOCEAN5_WAKEUP_UART   0x0A

ENOCEAN5_WAKEUP_UNKNOWN_RESET

#define ENOCEAN5_WAKEUP_UNKNOWN_RESET   0x09

ENOCEAN5_WAKEUP_VOLTAGE_DROP

#define ENOCEAN5_WAKEUP_VOLTAGE_DROP   0x00

EnOcean 5 wake-up cause bytes.

Specified wake-up cause bytes of EnOcean 5 Click driver.

ENOCEAN5_WAKEUP_WATCHDOG

#define ENOCEAN5_WAKEUP_WATCHDOG   0x02